arduFPGA-game, an arduboy/FPGA clone with audio decoder

The board is designed around a LATTICE iCE40UP5K and in this case implement a ATmega32U4 with the necessary IO’s to run unmodified arduboy games, also ( optionally ) includes a VS1053b audio decoder to play music from uSD or create games with more complex sounds.

This board is a derivation of ARDUFPGA ICE40UP5K V1.1 board.

in portable format with a size of only 67x42mmin size, smaller than a credit card.

As hardware, there is:

1x SSD1306 OLED 128x64 BW display, or ST7735S LH096TIG11 0.96 inch 80x160 TFT Color 64K Colours.
1x 2MB of SPI FLASH where the design, the GUI boot-loader and the user application (game) is located, with an endurance of minimum 100K erase/write.
1x Optionally VS1053b dedicated audio decoder.
1x Piezoelectric buzzer.
1x RGB powerfull LED that can be used as flashlight without exiting the game that you play.
1x Dedicated battery charger with status LED’s.

Design and firmware’s:

Games and applications are load from a uSD card thru two stage boot-loader:

The first stage that is written inside the design and has its own 4KBytes of ROM memory and 512Bytes of RAM memory, it has even a dedicated interrupt vector named NMI that interrupt the running game every 1mS and check for INT button to be press, this is a service function that is used to check for INT button to be press and optionally can integrate a debug option to debug the core with thru UART unit.

Second stage is a GUI explorer/boot-loader that is load into the emulated ATmega32U4 program memory running like a normal application and include a FAT FS library, this application check and update the design and GUI boot-loader every time a game or application is launch, in case if the running design is custom made for that application or game, when the game or running application is interrupted the GUI boot-loader will automatically save the EEPROM content to the uSD card, and load the EEPROM content from uSD card when a game or application is started, so, all game scores and history is saved if the game is changed.

At this moment all games are in binary format, need to be converted from hex to bin files in order to run.

The design has the capability to increase the size of ROM and RAM memory according to each developer necessities, but no more than 128KB combined.

Different designs, applications source code,boot-loaders source code, user guides, schematic’s and other stuff will be available on:

Of course, design and application ideas are very welcome.


I disabled the startup update, has no reason to exist if every time when an application is started it check’s if need to update the design and GUI boot-loader.

If you short press the INT button ( between 100mS and 500mS ) the game is interrupted and the EEPROM content is saved to the uSD memory.

If you press INT button more that 500 milliseconds, the keyboard is disconnected from the application, and buttons have other functionalities done by the first stage boot-loader that runs like a bios in background.

The features of the first stage boot-loader when INT button is press are:

  • INT+ B button change the LED colour B,G,R.
  • INT+ A button turn ON/OFF the flashlight (RGB led becomes flashlight).
  • INT+ UP increase the game volume in four steps, from mute to maximum.
  • INT+ DN decrease the game volume in four steps, from maximum to mute.
  • INT+ LEFT switch the USB connector function between UART RX/TX and video NTSC composite output.
  • INT+ RIGHT switch the audio connector function between audio and video NTSC composite output, as protection to avoid driving the audio connector by VS10xx and the FPGA, when VS10xx is out of reset the audio connector can not be switch to composite output.

The features of the first stage boot-loader with debug module enabled is:

All this functionalities at the same time when you playing games or listen music.

The volume mostly has effect on headphones, the piezoelectric buzzer does not react to much to the volume change, the volume is changed using two four bit PWM generators in the design that are connected to PORTA bit [3:2], bit [3:2] of the PWM are connected to ‘0’ and bit [1:0] to PORTA, the real maximum volume is 1/4 of total power to avoid blowing up the listener ears :slight_smile: .

There, on the board, is a VS1053b audio decoder, is waiting to develop an application to run with him :).

The audio connector is connected directly to VS1053b and three pins of the FPGA, this pins are used by the game as audio outputs but alternatively can be used as data communication, one of the pins needing to be put to ‘0’ to provide the ground for the communication.

The micro USB connector is used for charging the battery, alternatively can be used for data communication, three pins of the FPGA are wired to this connector to D+, D- and ID and can have any desired function.

The current design is a reduced IO, ATmega32u4 compatible core with 64KB of emulated FLASH memory and 32KB of RAM memory, TIM0, TIM3, TIM4, SPI, UART, emulated EEPROM, extra-reduced PLL ( USB clock generator strip away ), 10bit LFSR RNG as ADC.
System IO’s:

  • PIOA used for design FLASH chip select, application FLASH chip select. external chip select on the ARDVARK connector, volume control as outputs, switch USB connector function and switch audio connector function, all seven keys and LoBat signal as inputs.
  • Ports 0xDB-0xFF used for boot status and FLASH memory write registers.

The external chip select on the ARDVARK connector can be used as CS for an external SPI device connected to ARDVARK connector and in case if the user brick’s the arduFPGA console to recover it using any other arduFPGA console or a regular SPI programmer.

A secondary four pin header is available and marked with TWI function, two pins for power and two for communication, the power can be selected by a strap selector for 3.3V from LDO or VBAT, the two pins for communication can be used for any purpose.

Board consumption from the battery is 29mA with the display at maximum bright ~90% of the pixels active, uSD initialized, RGB LED OFF, and VS1053b in reset mode ( no consumption ).

The board is smaller than a credit card only 68x43x10mm in size and the space in the back of the board close to audio connector can be glued a battery up to 1Amp’s in capacity giving a huge game play/ music listen time for one charge.

Here is a demo:

The board is a little bit fried ( ehh, is the prototype ) :smiley:


Looks interesting. What are the advantages of using an FPGA instead of a real ATmega chip?

Has anyone else ever made an Arduboy clone with uSD support? The gamebuino classic had one so I imagine it could be possible.

If you use a FPGA you can increase the ROM memory in case you have more sprites, you can load them as necessary from an external memory or from uSD (if you include FAT support in the game) without worrying of wearing out the uC FLASH memory, or you can increase the RAM, or both memory’s from design as necessary, you can add custom accelerators for graphics, sounds…, you can run games and applications made for multiple platforms on the same board.

You can add a simple expansion board connected to microUSB connector to output VGA or composite signal generated by an IP included in the FPGA design and not generated by software that runs on the uC and eat a lot of uC cycles.

The running game does not need to know how to work with the uSD to load other games, it uses a dedicated GUI boot-loader, this board is able to run unmodified games made for arduboy.

Later I will add support for 8080, Z80, 6502…

Interested to follow along on this project, thanks for chatting with me @MorgothCreator about it!

I think this would be really cool if you can actually program it with circuit python also, or maybe even… lua? Pico 8? I think if you are going for an FPGA project you should try to make it compatible with many “systems”!


Got it :+1:

Looks like there is a Game & Watch core for MiSTer in the works now too - would be a perfect fit for this! :slight_smile:

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Yap, they need to develop some serious synchronization with human potential, or prepare him for Musk’s neuro-link :rofl:

I see no details for the project, even on github, I like my eye to scan some code.

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After a week having my liver eat by customs in my country :smiley: , finally the components and boards for the prototype are beginning to arrive.

Shortly after all components are centralized at my office and I assemble them, I will make available some videos with functionality demos.

If everything is OK ( no design mistakes are made ), several of them will be available for purchase.

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The boards has arrived,

A preview:


Prototype board update:

Ehh, there is a mistake and a connector miscalculation…

Mistake: The Lo Battery LED positive pin is wrongly wired to USB V+ pin instead of general power wire, so when battery becomes low on energy the Lo Battery led only shortly blinks one time and stay OFF, this can be remediated by soldering a SKHOTTKY diode between battery and USB+ to have some voltage on the USB+ from the battery, but is not permissible such a mistake :upside_down_face:

Miscalculation: the battery connector, is to small ( 1.27mm between the pads ), too small to be easily soldered by people, so I will replace it with a 2.54mm one.

In rest, everything works as a charm :crazy_face:

So, the prototype remains the prototype :slight_smile: and no more.

PICO-8 seems very interesting :smiley: , I see that the IDE is designed to create color games, there can be attached a color LCD to the ARDVARK connector and have two displays :upside_down_face: .

As soon as I escape from the import stuff and the boards to be ready for delivery, I will enter to deeper study this problem.

I already begin to develop an scratch like IDE for easy to compose designs according to each developer needs without needing to know RTL programming.

A draft of the user guide for this board has been uploaded:

Working on an IDE like scratch to compose designs for arduFPGA iCE40UP5K and arduFPGA-game for a easier way to create designs without coding knowledge :smiley:

Now arduFPGA-DesignComposer begin to generate some code :star_struck:

It will need some white nights :slight_smile: and a lot of beer…

Done in QT MinGW for cross platform compatibility.

Need to implement some more modules and begin to create the graphic representation of the modules, that windows with setups will appear only on module setup, on final stage of development, on the main window will appear only the modules representation in graphic mode with wires between them and a summary description of each module on how is configured inside each module.
The wiring will be done via drag and drop procedure, where you click left on from where the wire will start and right click on where the wire to go.


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Board Update:

Due to Covid issue delaying the paper needed to be issued by Romanian state to be in legal framework to be able to legally manufacture and sell these boards, I spend some time thinking of what options I can add to the board to be more versatile and cover a more broad use cases for the user to enjoy.

So, I developed the option to add a ST7735S LH096TIG11 0.96 inch 80x160 TFT Color 64K Colours Display wired at the same SPI bus as the SSD1306 QG-2864KSWEG01 OLED BW Display, so, there will be an option with 128x64 Pix BW OLED and one with ST7735S 80x160 TFT 74K colors.

The version with the TFT display will have no secondary FLASH memory, the Chip Select of the FLASH being used as PWM signal for the TFT back-light.

The version with the TFT display will be able to play the arduboy games using a SSD1306 IP emulator out of the box, the single difference is that the TFT display will show the arduboy games screen a little bit smaller than SSD1306 OLED display, but maybe later I will be able to do some IP hardware smooth up-scaling.

This is the display that I add support to:

Either one the buyer will choose, there will always be possible to swap the display with the other one purchased from ebay fro example or other sites without any changes on the board, needing only some soldering skills and changing the design image in the root directory of the arduboy games.

My initial goal was to be able to solder a 240x240 pix TFT color display but unfortunately the display is a little bit to large for the space assigned to the display on the board, ultimately this display will be 100% compatible to be used on the arduFPGA iCE40UP5K in the SSD1306 socked without any changes in the hardware as well as the LH096TIG11 0.96 inch 80x160 TFT display with BLK pin wired to another pin on the board or wired at VCC.


Boring due to Covid issue:

Because there is the Covid issue and some of us ( depending of the state ) we are forced to stay at home in the dark looking at the walls how they move :unamused:, I placed some orders on the ebay to fill up some time when I am tired on working on other stuff.

This being tell, one of the stuff that I waiting is this:

LiDAR Delta2B

and the other is this:

Meh, sometime I like to work a little bit more clean without to much improvisations :innocent:

To begin to play a little bit with this:

Using this:

My goal is to command the Bioloid Spider thru one wire of the USB connector of the arduFPGA game-console as Rx/Tx ( servos of this robot being controller using UART one wire Rx/Tx, all servos data pins being wired together, total 18 servos ), on the other two pins as PWM control and Rx data receive from the LIDAR scanner and on the SPI BUS of the ARDWARK connector I will put a SPI transceiver that I will decide later of what transceiver to use ( my house is a disaster being under construction and I can’t find the components whatever they are), you know, when you are tired of gaming or listen music on arduFPGA game-console you can do other stuff plugging it in other stuff to control :crazy_face: :smile:.

Depending of the first results I will remain with an emulated Atmega core version or one of the emulated RISCv core IP’s already developed but customized for this purpose.

I like that vertical micro usb connector. I’ve thought about making an Arduboy stand that is a pcb like that just with a wider base and another normal micro usb connector.

One of my friends just published the first version of a mostly-AVR-compatible core at This could be useful for compatibility, at least once it gets shaken out a bit more.

I scan with my eyes a little bit the project and even if he put it in two stage pipeline and use an explicit instantiation of registers in DPRAM mode does not break through 12Mhz frequency, until I watch this project I believed that I am too lazy to change to much things in the core to increase the frequency :sweat_smile:.

Now I know that the structure of how the iCE40UP FPGA is designed does not allow higher frequencies on such complex designs.

With my ATmega core I managed to obtain ~13Mhz with designs that use ~85% resources without timing violations, and working at higher that 16.125Mhz overclocked.

Good that the link is on this thread, I will have an eye on it from time to time to see the direction, working frequency and resource usage, even if is working on lower frequency if is eating less resources than mine will have a good shot to use it in some designs :slight_smile: