I don’t think they are disabled by hardware automatically because the STM32F103 supports interrupt cascading (i.e. an interrupt can occur during the processing of a previous interrupt). But, I might not really need to disable interrupts for this anyway.
Interesting… I hadn’t thought of that approach, but that might just do it!
It would slightly slow down the transition from data -> command (slightly), so it’s possible it would now get ‘extra’ data (that are really commands)
Maybe. I tried with a naked ISR and it didn’t work at all, probably because it was overwriting a register inappropriately. I haven’t yet dug into converting this to a pure inline assembly ISR.
I was originally polling the pins continuously but that had even worse latency. I am already driving VGA with interrupts, but I can’t poll SPI from within the vga interrupts as they have very strict timing requirements.
I ‘think’ I get what you are saying now. Basically pre-decide whether the next transition would be an enable or disable and change the ISR vector on the fly accordingly? I think this would require running the vector table from memory which I think IS possible with these MCUs but needs to be researched a bit more.